Karmel Electronic Design Services was founded by Avner Landver and is based in Israel. Avner has 20 years of experience in formal verification.
Prior to Karmel EDS, Avner worked at Cadence Design Systems where he founded the Incisive Formal Verification product line in 2003 and took it from inception to market leadership. IFV was designed as a merger of Cadence StaticCheck and Verplex BlackTie.
Before Cadence, Avner was at Verplex Systems where he managed BlackTie, the company’s property verification tool. During this period, Avner's team invented the methodology of Designer Level Formal Analysis and introduced it into the market.
Avner came to Verplex from the Intel Design Center in Haifa. At Intel, he introduced formal verification into the processor design team and managed a team that formally verified several critical parts of the Centrino processor. Prior to that at Intel, Avner managed a global team of experts that defined and implemented ForSpec, a comprehensive formal specification language. ForSpec later became the basis for the System Verilog Assertions IEEE standard.
In 1993, Avner joined the RuleBase team at IBM Research Laboratory in Haifa. His main focus was on deployment, services, methodology and the design of language constructs and algorithms. This included Sugar and the introduction of regular expressions in RCTL which were later the basis for the PSL IEEE standard.
Avner holds a Ph.D. in Mathematical Logic from the University of Wisconsin at Madison and a BA in Mathematics and Economics from the Hebrew University.
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